Description
This detailed reference characterizes various defect and failure mechanisms in both combinational and sequential QCA devices. The book presents new design methodologies that have been proposed for QCA and describes clocking schemes that reduce kink errors in QCA. This comprehensive volume identifies and investigates unique QCA timing constraints and sequential designs. As a basis for CAD implementation, the book proposes algorithms that assign clocking zones and stretch paths for delay matching. Additionally, you find a comprehensive nanotechnology survey, detailing the advantages and disadvantages of various technologies. Other key topics include tile-based modular design, new memory architectures, and future QCA research directions.
Table Of Contents
Introduction - Challenges. Previous Work. Contributions. Book Outline.; Overview of Nanotechnology - Nanoelectronic Devices. Nano-Scale Crossbars. Architectures. Array-Based Architectures.; QCA - QCA Implementation. Clocking. Power Gain and Dissipation. Comparison of Nanotechnology.; QCA Combinational Logic Design - Conventional Gate-Based Combinational Logic Design. Logic Synthesis. Structural Design.; Logic-Level Testing - Stuck-at Test Properties of MV-Based Circuits. Test Set for MVs. C-Testability of MV-Based Designs.; Defect Characterization of Devices - Simulation Engines. MV Defect Analysis. Interconnect Defect Analysis. INV Defect Analysis. Probabilistic Analysis and Testing. Defect Analysis and Testing of QCA Circuits. Scaling in the Presence of Defects. Conclusion.; AND-OR-Inverter (AOI) Gate - AOI Gate Characterization. Defect Characterization of the AOI Gate. Logic Level Testing of AOI Gate Based Circuits. Logic Synthesis Using the AOI Gate. Conclusion.; Two-Dimensional Schemes for Clocking/Timing of QCA Circuits - Clocking Analysis. Two-Dimensional QCA Clocking. Two-Dimensional Wave QCA Clocking. Examples of QCA Circuits. Feedback Paths. Simulation Results. Conclusion.; Tile-Based QCA Design - QCA Design by Tiling. Fully-Populated Grid Analysis. Tiles of a 3 x 3 Grid. Logic Analysis. Examples of QCA Circuits. Discussion. Conclusion.; Sequential Circuit Design in QCA - RS Flip-Flop and D Flip-Flop in QCA. Timing Constraints in QCA Sequential Design. Stretching Algorithm for Delay Matching. Defect Characterization of QCA Sequential Circuits. Discussion and Conclusion.; QCA Memory -Introduction. Review of QCA Memories. Parallel Memory Architecture. Serial Memory Architecture.; Implementing Universal Logic in QCA - Universal Gate. Universal Gate Designs. Memory Based LUT. Multiplexer Based LUT. Discussion and Conclusion. Conclusion and Future. Bibliography.;
Author
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Jing Huang
Jing Huang is currently a Ph.D. candidate and research assistant in the Department of Electrical and Computer Engineering at Northeastern University, where she received her M.S. in science and electrical engineering. Her research interests include testing, design for testability, and fault tolerance of VLSI systems and emerging technologies.
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Fabrizio Lombardi
Fabrizio Lombardi is currently the holder of the International Test Conference (ITC) Endowed Chair Professorship at Northeastern University. He has been the recipient of numerous professional awards and recently served as associate editor-in-chief of the IEEE Transactions on Computers. Dr Lombardi holds a Masterís degree in microwaves and modern optics and a Diploma in microwave engineering from University College London. He earned his Ph.D. at the University of London.