Description
ICs for microprocessors, DSPs, microcontrollers, and telecommunications are increasingly demanding higher frequencies ranging from 200 to 4000 MHz. Monolithic PLLs can meet these demands, but properly designing new monolithic PLLs is a demanding, complex activity. To guide you through design, simulation, and troubleshooting, turn to this collection of practical solutions, SPICE listings, simulation techniques, and testing set-ups. Systems designers are requiring that more and more functions be integrated onto a single chip. So you can meet these challenging requirements, this book explains how you can design PLLs so they are isolated from other circuits on a chip, consume minimal power, occupy small die areas, use small value capacitors, and avoid the need for inductors. It gives you all the transistor-level details for designing today's ICs and provides SPICE simulations and methods for verifying performance. This easy-to-reference handbook also thoroughly covers traditional PLL design and development.
Table Of Contents
Overview of PLLGeneral Description. Phase-Locked Loop (PLL) Literature. Loop Classifications. Example Applications.; System AnalysisTransfer Function and Control Systems. Loop Stability, Bode Plot Analysis. Loop Stability, Root Locus Analysis. Loop Component Synthesis for Charge Pump. ; System RequirementsNoise Basics. Phase Noises. Jitter. Time Domain Response and Stability. Acquisition of Lock. Spurious Signals. ; Components: Oscillators and DividersDividers. VCOs. Reference Oscillators. ; Components: Detectors and OthersPhase Detector. Lock Detectors. Acquisition Aids.; Loop Compensation Synthesis RevisitedRanking Requirements. Loop Component Synthesis. Active Compensation and Minimum Capacitor Value. Sampling Delay. Fast Switching Time. Minimum Bandwidth. Maximum Bandwidth. Maximum Divide Ratio. Optimum Phase Noise Design.; Test and MeasurementSpurious Signal, Hold in Range, and Lock Range. Step Response. Closed Loop Bandwidth Measurement. Phase Noise Measurements in the Frequency Domain. Jitter Measurements. Test Equipment. Trouble Shooting PLL.; SimulationSPICE (Transistor Level). Behavioral Model (Block Level). C Programs (Equation Level).; Applications and ExtensionsSynthesizer. Clock/Carrier Recovery. Effects of Phase Noise on A/D Converters. All Digital PLLs. ; AppendicesGlossary. Symbols.;
Author
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Stanley Goldman
Stanley Goldman is a distinguished member of the technical staff at Texas Instruments, working in the Wireless Mixed Signals Product Group. A widely known author and presenter, holder of several patents, and a senior member of the IEEE, he holds a B.S. in electrical engineering from Carnegie-Mellon University.